External Loopback is commonly used for testing interface circuits in microchips by configuring the internal circuitry to allow an input test signal to be input into the receiver of an interface and routed back out through the transmitter of the interface. The output signal is analyzed and compared to the input signal to see how the internal circuitry affects the input signal. When the test signal is inside of the interface, it follows a pre-determined path that is designed to test specific internal circuits. External loopback is useful for characterizing the circuits along the internal path and providing the visibility outside the silicon that would otherwise be impossible to check. Particularly, such characterization can be used to facilitate lab to production transition.
In a typical synchronous dynamic random-access memory (SDRAM) design, each data byte (8 bits of data) of a ×8 SDRAM device or each nibble (4 bits of data) of a ×4 SDRAM device is associated with a dedicated data strobe (DQS). The data bits (DQ) and differential data strobe (DQS) are transported through bi-directional buses and are driven by the memory controller during a memory write and driven by the memory during a memory read. Conventionally, in the application of having two ×4 devices for a data byte, a memory controller only integrates a single-direction loopback path that allows tests signals to be input from a particular data strobe interface (e.g., DQS1) and return to the other data strobe interface (e.g., DQS0). In a device capable of differential data strobe, each data strobe interface may include a pair of data strobe ports, each port coupled to a pin and a pad. For example, a differential test signal can be input from a pair of data strobe pins (e.g., DQS1_P/DBI and DQS1_N pins) and returns to another pair of data strobe pins (e.g., DQS0_P and DQS0_N pins). Therefore, only the internal circuitry along this particular path can be characterized.